UPC Non Redundant Data Cache Carlos Molina, Carles Aliagas and Montse García Universitat Rovira i Virgili – Tarragona, Spain

Presentación del tema: "UPC Non Redundant Data Cache Carlos Molina, Carles Aliagas and Montse García Universitat Rovira i Virgili – Tarragona, Spain"— Transcripción de la presentación:

1 UPC Non Redundant Data Cache Carlos Molina, Carles Aliagas and Montse García Universitat Rovira i Virgili – Tarragona, Spain {cmolina,caliagas,mgarciaf}@etse.urv.es Antonio González and Jordi Tubella Universitat Politècnica de Catalunya – Barcelona, Spain {antonio,jordit}@ac.upc.es ISLPED´03, Seoul (Korea) - August 25-27, 2003

2 Motivation Caches spend close to 50% of total die area Caches may be responsible for 10% to 20% of total power dissipated by a processor

3 Data Value Replication

4

5 Objective To reduce die area But mantaining miss ratio Latency Energy consumption

6 Conventional Cache If (Value A==Value B) then Value Redundancy Value A Value B 12345 Tag X Tag Y

7 Non Redundant Data Cache (1) Pointer Table Value Table 12345 Tag X Tag Y 12345 Die Area Reduction Tag X Tag Y Additional Hardware: Pointers Additional Hardware: Counters 12345count

8 Data Value Inlining Some values can be represented with a small number of bits (Narrow Values) Narrow values can be inlined into pointer area Simple sign extension is applied Benefits enlarges logical capacity of VT reduces latency reduces power dissipation

9 Tag X Tag Y 10count Non Redundant Data Cache (2) Pointer Table Value Table count Tag X Tag Y 10

10 Simulation Enviroment Simulators Cacti tool version 3.0 (Static Analysis) Alpha version of SimpleScalar 3.0 (Dynamic Analysis) Benchmarks Spec2000 Maximum Optimization Level DEC C & F77 compilers with -non_shared -O5 Statistics Collected for 1 billion instructions Skipping initializations

11 Inlining Performance

12 Die Area

13 Latency

14 Energy Consumption

15 Miss Rate vs Die Area | | | 0,1 0,5 1,0 cm 2 Miss Ratio % % % % % % % %

16 Results Caches ranging from 256 KB to 4 MB

17 Conclusions High degree of value replication is present in conventional caches Non redundant data cache Data value inlining Die area reduction Energy consumption reduction Access time reduction Minor miss ratio increasing

18 UPC Non Redundant Data Cache Carlos Molina, Carles Aliagas and Montse García Universitat Rovira i Virgili – Tarragona, Spain {cmolina,caliagas,mgarciaf}@etse.urv.es Antonio González and Jordi Tubella Universitat Politècnica de Catalunya – Barcelona, Spain {antonio,jordit}@ac.upc.es ISLPED´03, Seoul (Korea) - August 25-27, 2003